Abstract
In this paper a DC-DC converter with high voltage conversion ratio and low chip area, which is useful for RFID tag chip, is presented. DC-DC converter is modeled with neural network while TLBO algorithm is used to optimize it. In each stage of the converter the charge transfer switch is used for increasing the voltage gain. Each charge transfer switch is dynamically controlled with the inverter and the charge transfer switch is completely becomes on and off. By using the achieved results of the TLBO algorithm, the output voltage and voltage conversion ratio of DC-DC converter are 7.741 V and 86% , respectively, while the input voltage is considered 1.8 V. The layout of the DC-DC converter chip area drawn in Cadence software is 60μm*60μm. The neural network and TLBO algorithm are programed with Matlab software and the Cadence software is used for extracting the circuit primary samples and simulating the final design of DC-DC converter in 0.18μm CMOS technology.
Introduction
This research is supported by the University Malaya Research Grant (UMRG) Grant RP023-2012D, H-00000-56657-E13110 from the University of Malaya.
By the technology advancement in recent years, the wireless communication becomes more important and applicable. RFID is the wireless identification system that transmits the data between the reader and tag through the radio waves. The passive tags, which are activated with the sent radio waves from the reader, are more considerable as they have lower fabrication cost and chip area. By increasing the distance between the reader and the tag, the power and input voltage of the passive tag is decreased. The different parts of the tag such as the memory and digital part needs the voltage higher than the tag input voltage. Therefore it is necessary to rectify the input voltage and then increase it with the voltage multiplier in order to achieve the higher output voltage. The charge pump circuit is used as the voltage multiplier in this design.
The charge pump is the DC-DC converter, which is used for gaining the higher output voltage from the input voltage. Most of the charge pumps work based on the Dickson charge pump which consists of two [1–4] or four [5] clock signals. The four-clock signal charge pumps dissipate more power. The diodes are used in the charge pump circuit as the switches and the diodes can be replaced with the diode-connected MOSFETs. If the employed voltage to the MOSFET transistor is lower than the threshold voltage, the MOSFET transistor doesn’t conducted. Since the switches of the Dickson charge pump are connected to each other in series, by increasing the number of stages the voltage drop is linearly increased. Thus the voltage gain of this charge pump is very low. To improve the charge pump efficiency, the large numbers of circuits have been recently proposed. In Ref. [6] the improved diode-connected MOSFETs have been used to overcome the body effect and decrease the threshold voltage. In this structure the body of PMOS (NMOS) is dynamically connected to the highest (lowest) circuit voltage. Charge transfer switch (CTS) charge pump is utilized the dynamic switches for ameliorating the voltage pumping gain [7]. The chain of auxiliary switches are connected in parallel to the diode-connected MOSFETs. Theseauxiliary transistors are derived from the next stage by the higher feedback voltages. Unfortunately the auxiliary switches aren’t employed perfectly to the circuit and consequently the voltage gain of the charge pump is considerably reduced in compare with the calculated value. Dynamic CTS charge pump dynamically controls the input of CTSs and actives and deactives the CTSs completely [8–10]. Therefore the reversible current is prevented which culminates in the improvement of efficiency and voltage conversion ratio of the charge pump. For optimizing the design of analog integrated circuits, trial and error method isn’t the optimizing way for changing the circuit parameters to reach the desired result. To overcome this difficulty, various methods are applied to the analog integrated circuits. In this paper, for having the optimized design of analog integrated circuits, the neural network and TLBO algorithm are used. The dynamic CTS charge pump is modeled to the mathematical function by the neural network. Then for ameliorating the voltage conversion ratio and reaching the maximum output voltage, the charge pump circuit is optimized with TLBO algorithm by considering the minimum chip area of it.
The total structure of this paper is as follows: the optimized charge pump is presented in Section 2. Neural network and TLBO algorithm are described in Section 3. The simulation and comparison results are presented in Section 4 and finally the whole work is concluded in Section 5.
The proposed charge pump
The four- stage-dynamic CTS charge pump is shown in Fig. 1.
The charge transfer switches, which are controlled by the inverter pair (MN1-MP1 to MN4- MP4), are employed to the CTS charge pump for the purpose of transferring charge to next stage without any drop threshold voltages. Figure 2 shows the ideal voltage waveform of the optimized charge pump in steady state.
Each stage of the optimized charge pump consists of one diode-connected MOSFET transistor, one charge transferring switch, one pair of inverter and one capacitor. The amplitude of CLK and CLKB signals and also the input voltage are equal to VDD. During the time of T1, when CLK clock signal is at low logic and CLKB clock signal is at high logic, the voltage of nodes (1) and (2) equal to VDD and 3VDD, respectively, thus MP1 transistor becomes activate and the gate voltage of MC1 reaches to the voltage level of node (2). The charge transfer switch of MC1 can be completely activated for transferring the charge from the supply voltage to node (1). During T2, CLK and CLKB clock signals are set to the high and low logics, respectively. The voltage of node (2) is pumped to 2VDD and MN1 transistor is on while MP1 is off. Therefore to prevent the reversing of charge to the supply voltage, the charge transferring switch of MC1 is completely off. The operation of the following stages is similar to that of first stage and consequently the output voltage reaches to 5VDD. But in reality the output voltage is lower than 5VDD, because of the drop voltage of charge transfer transistor through the path of input to the output. In addition, in the previous designs the size of charge transfer capacitors was considered in the range of Pico-farad which leads to more chip area. In this paper, the aim is increase of voltage conversion ratio and also reduction of charge transfer capacitor size to decrease the chip area, by using the optimization technique.
Nerual network and TLBO algorithm
For the optimization, the charge pump circuit is modeled to the almost nonlinear function by neural network. The achieved function from neural network is optimized with TLBO algorithm. In this design, Cout, C1, C2, C3 and C4 are equal. Therefor 21 inputs are considered based on Table 1.
W and L of the internal inverters (MN2, MP2, MN3, MP3) are ineffective on the output voltage. Due to the impact of W and L of charge transfer transistors and the value of charge transfer capacitors and the size of first and last stage inverter transistors on the output voltage, W and L of only 10 MOSFET transistors and capacitors are considered as the circuit inputs. Given the fact that the aim of circuit optimization is gaining the maximum output voltage and minimum chip area, the output voltage of the circuit is selected as the neural network output and some limitations are employed to the neural network for the values of W, L and C.
Neural network
One of the more applicable neural network structures is the Perceptron network. In order to use the Perceptron network, it is necessary to identify the sample inputs and their outputs and employ to the network. Therefore the circuit outputs are achieved from 100 runs of simulation of various inputs in Cadence software and they are used for gaining the desired neural network. The purpose of training of neural network is finding the weights of Perceptron network layers for the minimum error between the estimated output and the achieved one. To fulfill this purpose three processes of normalizing, training and testing are considered. From the 100 simulated samples, 70 samples are used for neural network teaching process and 30 ones are kept for the test. In the first process all of the inputs and outputs are normalized to have the value between the range of [0,1]. Single layer Perceptron network is shown in Fig. 3.
Finally the train function, which has the error lower than 0.02, is achieved. In the last process 30 simulated samples are used for the test of train function.
The outputs of train function are compared with main outputs. As the average error is very small, this teaching process is useful for TLBO algorithm.
TLBO algorithm
TLBO algorithm is the novel optimization algorithm based on the population who are the member of class and their merit function, which are the grades for students, are considered as the objective function and they should be optimized during the optimization process. The operation of the TLBO algorithm is based on the teaching of the teacher in the classroom. The teacher has an important role in students’ learning. In addition if the students repeat and study the lessons, the lessons stick in their mind better. This idea is the base of TLBO algorithm for the optimization. The TLBO algorithm flowchart is presented in Fig. 4. The operation of TLBO algorithm consists of two parts: the first part is related to the effect of teacher on the improvement of students’ knowledge and the second part is related to the repetition of the lessons by the students.
Teacher phase
This phase creates the first part of the algorithm that the students try hard to improve the knowledge and grade of themselves based on the knowledge and information of the teacher. During this process the teacher tries hard to exploit all of his or her abilities to ameliorate the average knowledge of the class. The difference between the knowledge of the students and their teacher is expresses as Equation (1).
Where TF is the teaching factor that controls this difference and its value is chosen 1 or 2 randomly. In the next repetition, each of the students updates their new position based on Equation (2).
In this equation Xold is the students in the previous repetition and Xnew is the students in the new repetition. In the next process, the price function which is the students’ grade is calculated from the taught function of neural network. If the new generated result has better optimization for the price function, it is replaced with the previous result; otherwise the previous result is kept for the population. The output population of the first phase, teacher phase, is used as the input population for the second phase, student phase.
Also the students improve their knowledge by sharing their information with each other and repeating the lessons. Each student (Xi) chooses one of the other students (Xj) randomly and change the level of knowledge based on Equation (3).
Where Xi and Xj are i-th and j-th student of the class, respectively. If this level alteration causes that the grade of student becomes better, the new member is replace to the old member. The output population of the second phase, student phase, is considered as the input population for the next repetition. This process is done for the certain times.
The training procedure of single layer perceptron network is shown in Fig. 5.
As it is clear, by increasing the number of repetition, the error is decreased and after 2500 repetitions the teaching error reaches to the acceptable value of 0.02.
The mean and maximum errors related to the testing step, for the considered output are 3% and 17% respectively. In Table 2 the results achieved from the TLBO algorithm that is related to the defined inputs are shown.
The curve of the objective function which is achieved from the TLBO algorithm is shown in Fig. 6 for the number of repetitions. The optimized charge pump is simulated in 0.18μm CMOS technology with the help of Cadence software. By considering 1.8 V for the input voltage and 20 MHz clock frequency, the output voltage of the 4-stage optimized charge pump is equal to 7.74 V which is shown in Fig. 7.
The output voltages of the first, second, third and fourth stages of the optimized charge pump shown in Fig. 8 are equal to 3.31 V, 4.88 V, 6.51 V and 8.21 V, respectively.
Figure 9 shows the output voltage of the charge pump versus the input voltage for the different numbers of stages. The expected output voltage of the 6-stage charge pump for 1.8 V input voltage is 12.6 V. The observed output voltage of the 6-stage charge pump for 1.8 V input voltage is 10.8 V.
In Fig. 10 the effect of process variations is shown. By performing 350 runs of Monte Carlo simulation of the optimized charge pump the mean and standard deviation are calculated 7.604 V and 0.0918 V, respectively.
The layout of the optimized charge pump is shown in Fig. 11.
Table 3 presents the comparison of the charge pump, which is optimized with the TLBO algorithm, and the previous charge pumps. References [9, 10] have been presented the simulation of the charge pump without using TLBO algorithm.
Due to the Table 3 the voltage conversion ratio of optimized charge pump is higher than that of Refs. [9, 10] charge pump circuits. Also by considering the size of capacitors, the optimized charge pump has the lower chip area than that of Ref. [10] charge pump. Therefore the optimized charge pump has the higher voltage conversion ratio and lower chip area than those of other charge pumps presented in Table 3.
Conclusion
The high conversion ratio and low chip area DC-DC converter which is optimized with TLBO algorithm is presented in this paper for using on RFID tag chip. Each stage of the charge pump circuit has the charge transfer switch that can be controlled by the inverter dynamically. In this case the reversible current is prevented and consequently the efficiency and voltage conversion ratio are ameliorated. For the purpose of optimizing DC-DC converter, TLBO algorithm is used after modeling this circuit with neural network. By using the results achieved from the TLBO algorithm and despite of using small values capacitors, the output voltage and voltage conversion ratio of the 4-stage DC-DC converter, which is simulated in Cadence software, are 7.741 V and 86.01% , respectively, while the input voltage is set to 1.8 V. The chip area of the DC-DC converter drawn with Cadence software is 60μm*60μm. the neural network and TLBO algorithm are programmed in Matlab software. The optimized charge pump circuit is simulated in 0.18μm CMOS technology with the help of Cadence software.