High order distribute circuit model of laminated busbars and its order reduction techniques for simulating fast turn-on and turn-off transients

Abstract

A high order distribute circuit model of a laminated busbar is proposed in order to accurately simulate the fast turn-on and turn-off transients of a modern power electronic device. In the model, the predominant stray parameters of the loop inductance and the stray capacitance are considered. Moreover, a model order reduction (MOR) technique using the zero-pole elimination technique is presented to combat the high complexity of the extremely computationally expensive circuit model. The MOR methodology is implemented in two phases. The first phase is to compute the reduced order frequency model. In the second phase, this reduced model is synthesized into a circuit model in a netlist representation (RLC elements), which can be integrated in any SPICE-like circuit solver. Finally, the proposed model and methodology are used to solve the transient performances of a prototype IGBT based inverter, showing excellent agreements with the experimental results.

Keywords

Laminated busbar stray parameters model order reduction synthesized equivalent circuit

1. Introduction

Since the switching frequency of a power electronic value, such as an IGBT, increases tremendously, the large voltage overshoots occur frequently across IGBTs in high power inverters due to the stray parameters. Consequently, the high voltage stress may exceed the safe operating limit of semiconductor devices, ultimately causing the damage to the module. In this regard, a low stray inductance laminated busbar, the state-of-the-art pathway interface, is widely used to connect dc-link capacitors and semiconductor devices [1,2]. The laminated busbar results in an extremely high order distribute circuit model in order to accurately simulate the fast turn-on and turn-off transients of a modern power electronic device. Consequently, a wealth of efforts have been devoted to develop the transient models of an IGBT including a laminated busbar, such as analytical model, numerical model using finite element method, and the partial element equivalent circuit model (PEEC). However, an equivalent circuit model with an enough high solution accuracy and solution speed is still in developing stages [3–8].

In this paper, a high order distribute circuit model of a laminated busbar is proposed and an order reduction methodology is introduced.

2. High order distribute circuit model of laminated busbar and order reduction methodology

2.1. High order distribute circuit model

In a power electronic module, the predominant stray parameters include the busbar inductances and capacitances. Moreover, to simulate the characteristics of a laminated busbar, the busbar is modelled using a multi-sectional circuit model rather than one segment according to its laminated layout. In this point of view, the laminated busbar of a three-phase inverter prototype, as shown in Fig. 1, is modelled using a high order distribute circuit, as shown in Fig. 2. In the circuit, the stray inductance consists of the loop inductance and the intrinsic inductance of the capacitors and switches. When the IGBT turns on, the stray inductance prevents the increasing of the loop current to slow down the rise time of the voltage. Generally speaking, the main distribute inductance is the loop inductance. The stray capacitances consists of the capacitances between any two segments and between each segment and the ground. And the main stray capacitance exists between each segment and the ground. In this regard, the stray capacitance of each segment is considered as a capacitor with a common point which is connected to the ground approximately [9–14].

Fig. 1.

A two-layer laminated busbar.

Fig. 2.

Equivalent circuit of the current communication loop of Fig. 1.

To consider the skin effects of high frequency electromagnetic fields, the stray inductance and capacitances are calculated from the harmonic electromagnetic field solution, using $\begin{eqnarray}\displaystyle X=\frac{1}{I^{2}}\left[-Im\oint _{S}\tilde{\vec{S}}\cdot d\vec{S}\right] & & \displaystyle\end{eqnarray}$ (1) where $\tilde{\vec{S}}=\dot{\vec{E}}\times \dot{\vec{H}}^{\ast }$ , X is the inductive/capacitive impedance, $\tilde{\vec{S}}$ is the complex Poynting vector.

2.2. Order reduction methodology

Due to the laminated characteristics of the busbar, the order of the distribute circuit of Fig. 2 is extremely high, resulting in an extremely computationally expensive circuit model. To address this issue, model order reduction (MOR) techniques have been proven to be very effective. A number of mathematics-based MOR techniques, including the Lanczos and Arnoldi algorithms, have been proposed to generate a low order approximation of a large-scale circuit problem. However, the matrix inversions or decompositions of these techniques lead to a heavy computational cost in engineering applications. In this regard, a zero-pole elimination methodology based MOR is proposed. The methodology is implemented in two phases. The first phase is to find the reduced order frequency model. In the second phase, this reduced model is synthesized into a circuit model in a netlist representation (RLC elements) so that it can be integrated into any SPICE-like circuit solver [3].

To determine the reduced frequency model of the system, a double pulse experiment is conducted, and the fast turn-on and turn-off transients in inverters are recorded (Fig. 3), and the energy distribution on the frequency is obtained from the spectrum analysis (Fig. 4).

Fig. 3.

Double pulse waveform of phase A under 950 V/300 A.

Fig. 4.

The energy distribution on the frequency.

To start with, the high-order S-domain transfer function of the original circuit (Fig. 2) is expressed as $\begin{eqnarray}\displaystyle G_{1}=\frac{a_{n-1}s^{n-1}+a_{n-2}s^{n-2}+\cdots +a_{1}s^{1}+a_{0}}{b_{n}s^{n}+b_{n-1}s^{n-1}\cdots +b_{1}s^{1}+b_{0}}. & & \displaystyle\end{eqnarray}$ (2)

According to the energy distribution of Fig. 4, one retains the zeros and poles from 0 Hz to 10⁸ Hz, and eliminates the high frequency zeros and poles, obtaining the reduced order transfer function G₂ as $\begin{eqnarray}\displaystyle G_{2}=k\frac{(s+c_{1})(s+c_{2})\cdots (s+c_{r})}{(s+d_{1})(s+d_{2})\cdots (s+d_{r+1})} & & \displaystyle\end{eqnarray}$ (3) where c_i (i = 1…r) is the ith zero, d_j (j = 1…r +1) is the jth pole. Moreover, k is a constant to guarantee that the amplitude and phase characteristics of G₁ are equal to those of G₂.

To synthesize a circuit model to have a transfer function being as close as G₂, a two objective optimization problem, the minimization of the deviation of the amplitude of the frequency response characteristics between the synthesized equivalent circuit and the reduced model transfer function, and the minimization of the order of the synthesized equivalent circuit, is formulated as $\begin{eqnarray}\displaystyle \left\{\begin{array}{@{}l@{}}\text{minimize }f(\boldsymbol{x})\\ \text{minimize }g_{2}^{\prime }(\boldsymbol{x})\\ \text{s.t. }g_{2}^{\prime }(\boldsymbol{x})\lt g_{2}(\boldsymbol{x})\\ \forall x_{i}\in N_{+}\end{array}\right. & & \displaystyle\end{eqnarray}$ (4) where x ∈ R⁶ represents the 6 design variables, f( x ) is the deviation of the amplitude of the frequency response characteristics between the synthesized equivalent circuit and the aforementioned reduced model transfer function. Generally, for each design variable, x_i, it is limited in a range $[p_{i}^{-},p_{i}^{+}]$ due to design requirements and the original circuit model. Also, $g_{2}^{\prime }(\boldsymbol{x})$ and g₂( x ) are the transfer function orders of the synthesized equivalent circuit and the aforementioned reduced model G₂, respectively.

2.3. Block models of the reduced equivalent circuits

In order to synthesize the reduced model into an equivalent circuit, “π” model and “T” model are proposed in this paper, as shown in Fig. 5.

Fig. 5.

Block models of the reduced equivalent circuits. (a) π-model. (b) T-model.

To acquire an accurate transfer function of the reduced equivalent circuit, it is necessary to obtain the two-port S-function for a N-layer and P-layer busbar, respectively [13,14]. For a standard “T” model, the two-port extracted stray parameters are converted into a transmission matrix as follows $\begin{eqnarray}\displaystyle T^{i}=\left[\begin{array}{@{}cc@{}}A & B\\ C & D\end{array}\right]=\underbrace{\left[\begin{array}{@{}cc@{}}A_{1} & B_{1}\\ C_{1} & D_{1}\end{array}\right]\cdot \left[\begin{array}{@{}cc@{}}A_{1} & B_{1}\\ C_{1} & D_{1}\end{array}\right]\cdots \left[\begin{array}{@{}cc@{}}A_{1} & B_{1}\\ C_{1} & D_{1}\end{array}\right]}_{\text{number:}∼i} & & \displaystyle\end{eqnarray}$ (5) where, A₁ = s ⋅ c ⋅ r +1, B₁ = [(s ⋅ c ⋅ r +1)(s² ⋅ c ⋅ l +1) −1]∕[s ⋅ c], C₁ = s ⋅ c, D₁ = s² ⋅ c ⋅ l +1; l, c and r are the inductance, capacitance and resistance in a unit “T” element circuit, respectively, i is the number of “T” elements. The Y-parameter of the two-port system is thus obtained as $\begin{eqnarray}\displaystyle Y=\left[\begin{array}{@{}cc@{}}D/B & -1/B\\ -1/B & A/B\end{array}\right]=\left[\begin{array}{@{}cc@{}}Y_{11} & Y_{12}\\ Y_{21} & Y_{22}\end{array}\right]. & & \displaystyle\end{eqnarray}$ (6)

As the S-function of the “π” element circuit can be easily obtained, from the relationship between the Y-parameter and the equivalent “π” circuit, the “T” model based circuits are converted into a “π” lumped circuit. As a result, the two-port S-function for the “T” model based circuits is obtained as $\begin{eqnarray}\displaystyle Z_{T}^{i}(s)=\frac{Y_{pai1}+Y_{pai2}}{Y_{pai1}\cdot Y_{pai2}+Y_{pai1}\cdot Y_{pai3}+Y_{pai2}\cdot Y_{pai3}} & & \displaystyle\end{eqnarray}$ (7) where Y_pai1 = Y₁₁ + Y₁₂, Y_pai2 = Y₂₂ + Y₁₂, Y_pai3 = −Y₁₂. Following the same principle, the two-port S-function for the “π” model based circuit can be easily obtained.

To facilitate the reproduction of the proposed order reduction technique, Fig. 6 gives a step by step description of the proposed algorithm.

Fig. 6.

Flowchart of the proposed order reduction technique.

3. Numerical results

To validate the proposed model and methodology, it is used to simulate the switching on transients of the prototype IGBT based inverter as shown in Fig. 1. Using the previous stray parameter extraction method, the stray parameters of the laminated busbar (Fig. 1) are obtained and tabulated in Table 1.

Table 1
The stray parameters of the two-layer laminated busbar of Fig. 1

Extracted parameter Layer_pl Layer_pm Layer_pr Layer_nl Layer_nm Layer_nr A phase

Resistance (Ω) 1.40 × 10⁻⁴ 6.72 × 10⁻⁵ 6.80 × 10⁻⁴ 3.37 × 10⁻⁴ 7.81 × 10⁻⁵ 8.14 × 10⁻⁵ 5.71 × 10⁻⁴

Inductance (nH) 5.29 4.35 16.38 7.59 4.36 2.96 11.07

Capacitance (pF) 1386.9 838.53 1820.4 1389.5 841.01 1773.7 40.266

Extracted parameter	Layer_pl	Layer_pm	Layer_pr	Layer_nl	Layer_nm	Layer_nr	A phase
Resistance (Ω)	1.40 × 10⁻⁴	6.72 × 10⁻⁵	6.80 × 10⁻⁴	3.37 × 10⁻⁴	7.81 × 10⁻⁵	8.14 × 10⁻⁵	5.71 × 10⁻⁴
Inductance (nH)	5.29	4.35	16.38	7.59	4.36	2.96	11.07
Capacitance (pF)	1386.9	838.53	1820.4	1389.5	841.01	1773.7	40.266

These parameters are computed using finite element analysis.

Based on the extracted parameters and the original high-order circuit (Fig. 2), the 12-order S-domain transfer function of the original circuit model is obtained as $\begin{eqnarray}\displaystyle G_{1}=\frac{a_{11}s^{11}+a_{10}s^{10}+\cdots +a_{1}s^{1}+a_{0}}{b_{12}s^{12}+b_{11}s^{11}\cdots +b_{1}s^{1}+b_{0}}. & & \displaystyle\end{eqnarray}$ (8)

The coefficients a₁₁, a₁₀, …a₀ and b₁₂, b₁₁, …b₀ are given in Table 2.

Table 2

The coefficients of the original circuit model

i
	0	1	2	3	4	5	6	7	8	9	10	11	12
a _i	1.52 × 10⁹⁵	2.37 × 10⁹⁴	15 × 10⁸⁸	7.13 × 10⁷⁷	3.85 × 10⁷¹	6.02 × 10⁶⁰	2.25 × 10⁵⁴	1.87 × 10⁴³	4.43 × 10³⁶	2.4 × 10²⁵	2.7 × 10¹⁸	1.07 × 10⁷	-
b _i	7.88 × 10⁹⁷	5.78 × 10⁹⁵	16 × 10⁹¹	102 × 10⁸⁵	485 × 10⁷⁴	2.62 × 10⁶⁸	4.09 × 10⁵⁷	1.53 × 10⁵¹	1.27 × 10⁴⁰	3.0 × 10³³	1.6 × 10²²	1.83 × 10¹⁵	7.33 × 10³

The definition of a_i and b_i are reffered to Eq.(2).

The zeros and poles of the transfer function (8) is then computed and are shown in Fig. 7.

Fig. 7.

The zero-pole map of the high-order transfer function.

According to the energy distribution of Fig. 4, one retains the zeros and poles from 0 Hz to 10⁸ Hz, and eliminates the high frequency ones (Table 3) to get the reduced order transfer function G₂.

Table 3

The zeros and poles

Zeros	−6.4	1.5 ×10⁶	−3.7 ×10³	−3.7 ×10³	−3.2 ×10⁵	−3.2 ×10⁵	−1.4 ×10⁴	−1.4 ×10⁴	−2 ×10⁴	−2 ×10⁴
			−2.3 ×10⁸i	+2.3 ×10⁸i	+4.9 ×10⁸i	−4.9 ×10⁸i	+7 ×10⁸i	−7 ×10⁸i	+9 ×10⁸i	−9 ×10⁸i
	$\surd$	$\surd$	×	×	×	×	×	×	×	×
Poles	−137	−3.6 ×10⁴	−1.5 ×10⁶	−3.7 ×10³	−3.7 ×10³	−3.2 ×10⁵	−3.2 ×10⁵	−1.4 ×10⁴	−1.4 ×10⁴	−2 ×10⁴	−2 ×10⁴
				−2.3 ×10⁸i	+2.3 ×10⁸i	+4.9 ×10⁸i	−4.9 ×10⁸i	+7 ×10⁸i	−7 ×10⁸i	+9 ×10⁸i	−9 ×10⁸i
	$\surd$	$\surd$	$\surd$	×	×	×	×	×	×	×	×

Here “ $\surd$ ” and “×” represent the retained and eliminated zeros or poles according to the energy distribution (Fig. 4) and the zero-pole map (Fig. 7), respectively.

Once G₂ is obtained, one can utilize an intelligent computing method such as simulated annealing algorithm, genetic algorithm to solve the aforementioned two objective optimization problem. In this paper, the well-known genetic algorithm is used. After solving the two objective optimization problem, the reduced equivalent circuit topology is finalized, as given in Fig. 8.

Fig. 8.

Block models based the reduced equivalent circuits. (a) T-model. (b) π-model.

Fig. 9.

Reduced and original model results for a prototype IGBT.

Fig. 10.

Reduced and original model results for a prototype IGBT turn-on transient.

To validate the proposed model and methodology, it is used to simulate the frequency response characteristics (Fig. 9) and the switching on transients (Fig. 10) of a prototype IGBT. It is obvious that the computed results of the high-order distribute circuit model (proposed) is very close to the proposed reduced equivalent circuit model Also, the computed results by the reduced equivalent circuit models are very close to the tested ones.

4. Conclusions

With the rapid advancement in power electronics, the switching frequency of a power electronic valve increases tremendously. In this regard, the stray parameters of the circuits become more and more essential. In this point of view, a multi-sectional high order distribute circuit model is introduced in this paper. Although more closed to the actual circuit, the order of the multi-distribute circuit model is extremely high and an inefficiency computation is thus accompanied. To address this issue, a reduced equivalent circuit model for ensuring the solution accuracy and solution speed in circuit simulation is developed. The comparisons between the simulated and tested results evidence the feasibilities and merits of the presented work.

Footnotes

Acknowledgements

This work was supported by the National Natural Science Foundation of China under Grant No. 51490682.

References

Paul

and Chang

, Fast numerical analysis of electric motor using nonlinear model order reduction, IEEE Transactions on Magnetics54(3) (2018), 1–4.

Chen

Pei

Chen

and Kang

, Investigation, evaluation, and optimization of stray inductance in laminated busbar, IEEE Transactions on Power Electronics29(7) (2014), 3679–3693.

Tang

and Ma

, Dynamic electrothermal model of paralleled IGBT modules with unbalanced stray parameters, IEEE Transactions on Power Electronics32(2) (2017), 1385–1399.

Qiu

Liu

and Li

, Stray parameters in a novel solid state pulsed power modulator, IEEE Transactions on Dielectrics and Electrical Insulation20(4) (2013), 1020–1025.

Tolbert

L.M.

Wang

and Peng

F.Z.

, Stray inductance reduction of commutation loop in the P-cell and N-cell-based IGBT phase leg module, IEEE Transactions on Power Electronics29(7) (2014), 3616–3624.

Kim

K.H.

Kim

S.Y.

and Nah

, Modeling and parameter extraction of coplanar symmetrical meander lines, IEEE Transactions on Electromagnetic Compatibility57(3) (2015), 375–383.

Ando

and Wada

, Design of acceptable stray inductance based on scaling method for power electronics circuits, IEEE Journal of Emerging and Selected Topics in Power Electronics5(1) (2017), 568–575.

Luo

Iannuzzo

and Blaabjerg

, Enabling junction temperature estimation via collector-side thermo-sensitive electrical parameters through emitter stray inductance in high-power IGBT modules, IEEE Transactions on Industrial Electronics65(6) (2018), 4724–4738.

Gutierres

L.F.F.

and Cardoso Jr.

, Analytical technique for evaluating stray capacitances in multi conductor systems: Single-layer air-core inductors, IEEE Transactions on Power Electronics33(7) (2018), 6147–6158.

10.

Liu

Wong

T.T.Y.

and Shen

Z.J.

, A new characterization technique for extracting parasitic inductances of SiC power MOSFETs in discrete and module packages based on two-port S-parameters measurement, IEEE Transactions on Power Electronics33(11) (2018), 9819–9833.

11.

Zhang

and Wu

, Common-mode noise reduction by parasitic capacitance cancellation in the three-phase inverter, IEEE Transactions on Electromagnetic Compatibility61(1) (2019), 295–300.

12.

Kim

Lee

B.H.

and Yun

, Equivalent-circuit model for high-capacitance MLCC based on transmission-line theory, IEEE Transactions on Components, Packaging and Manufacturing Technology2(6) (2012), 1012–1020.

13.

Wang

Liao

Huang

Wong

Zhang

and Wang

, A wideband predictive “Double-π” equivalent-circuit model for on-chip spiral inductors, IEEE Transactions on Electron Devices56(4) (2009), 609–619.

14.

Watson

A.C.

Melendy

Francis

Hwang

and Weisshaar

, A comprehensive compact-modeling methodology for spiral inductors in silicon-based RFICs, IEEE Transactions on Microwave Theory and Techniques52(3) (2004), 849–857.