The research on active boost PFC

Abstract

The current wave form of active boost PFC is simulated in time domain and frequency domain. With the voltage of 220 v, the inductance of 15 mH, the capacitance of 5040 $\mu$ F, the load of 2500 W, the integrated power factor, fundamental power factor, and distortion are analyzed. The distortion is enhanced with the increase of frequency. Comparing high-order harmonic part under 10 mH and 15 Mh, it is demonstrated that the appropriate OFF phase angle changes with different requirement: the angle is 37 degree with distortion in least while the one is 34 degree with maximum integrated power factor. Topology and results are proposed. The results demonstrate that the power factor of real PFC circuit is up to 0.975.

Keywords

Boost PFC power factor high-order harmonic OFF phase angle electric power ripple

1. Introduction

The harmonic pollution becomes more and more dangerous. Most equipments preamp adopts PFC, which makes power factor close to 1. The PFC includes passive PFC and active PFC. The time domain and frequency domain of PFC are analyzed with the OFF phase angle and capacitor [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21]. The PFC is designed.

2. The simulation of boost PFC current

The transistor is shut off when the voltage is zero. The voltage is sin $\omega t$ . Hence the current of $L$ is derived [1]:

$\displaystyle i(t)=\smallint(v(t)/L)dt$ (1)

The transistor is on or off. The power of $L$ flows to capacitor Cm and load. When the current of $L$ is larger than that of load, the capacitor is charged; when the current of $L$ is smaller than that of load, the current of capacitor and inductance flows to load.

The current of $L$ is derived from [2, 3]:

$\displaystyle\textit{Vac}(t)-\textit{Vc}(t)=L\ dI/dt$ (2) $\displaystyle\Delta I=(\textit{Vac}(t)-\textit{Vc}(t))/L*\Delta t$

Where $\textit{Vc}(t)$ is the voltage of capacitor.

$\displaystyle(i(t)-\textit{Iload})=\textit{Cm}*\textit{dVc}/dt$ (3) $\displaystyle\Delta Vc=(i(t)-\textit{Iload})/Cm*\Delta t$

The waveform of current and voltage of capacitor is shown in Fig. 1 the parameters are as followed: the voltage of power is 230 V and the frequency of power is 50 Hz; the inductance $L$ is 25 mH; the capacitor is 2040 $\mu$ F; the load is 2500 W, the ‘on’ time of transistor is 45 degree of one period (2.5 msec).

Figure 1.

PFC scheme.

3. The higher harmonic of current

The higher harmonic of current is derived from Fourier transform.

$\displaystyle i(t)=\frac{i_{a0}}{2}+\sum\limits_{n=1}^{\infty}{\left\{{i_{an}% \cos(n\omega_{0}t)+i_{bn}\sin(n\omega_{0}t)}\right\}}$ $\displaystyle i_{an}=\frac{2}{T_{0}}\int_{-\frac{T_{0}}{2}}^{\frac{T_{0}}{2}}{% i(t)}\cos(n\omega_{0}t)$ (4) $\displaystyle i_{bn}=\frac{2}{T_{0}}\int_{-\frac{T_{0}}{2}}^{\frac{T_{0}}{2}}{% i(t)}\sin(n\omega_{0}t)$

Figure 2.

Current and voltage.

Figure 3.

Current harmonic.

Figure 4.

IEC61000-3-2.

The integral mean of current is shown in Fig. 2. The current harmonic is shown in Fig. 3 while the upper limit of harmonic is shown in Fig. 4. The most component is fundamental wave. There are fewer ripples.

4. The analysis of current

The integral mean of current in Fig. 2 is the current 11.1 A. The voltage 230 Vrms is obtained Also. The apparent power is 2553 VA while the load power is 2500 W. The integrated power factor (cos $\phi$ ) is 2500/2553 $=$ 97.9%.

Sine component of fundamental wave is $i_{a1}$ $=$ 10.86 A; cosine component $i_{b1}$ $=$ $-$ 1.74 A. they are in the same quadrant. The power factor of fundamental wave is cos $\phi$ 1 $=$ cos(tan-1( $i_{a1}$ / $i_{b1}$ )) $=$ 98.74%.

The power factor caused by waveform distortion is:

$\displaystyle\cos\phi\textit{THD}=\sqrt{i_{a1}^{2}-i_{b1}^{2}}/11.1=99.10\%$ (5)

Figure 5.

Harmonic at $L=$ 10 mH.

The waveform distortion is:

$\displaystyle\sqrt{1-0.991^{2}}=0.134$ (6)

The integrated power factor is mainly the result of cos $\phi$ 1 and cos $\phi$ THD: cos $\phi$ $=$ cos $\phi$ 1 * cos $\phi$ THD $=$ 98.74% * 99.1% $=$ 97.85%.

Figure 6.

Harmonic at $L=$ 15 mH.

Figure 7.

Distortion.

The integrated power factor can ignore the waveform distortion if the inverter capacitor doesn’t exist. If the inverters become intensive, cos $\phi$ THD must be taken into consideration.

4.1 Power higher harmonic

The upper limit of harmonic is by reference to Fig. 4. The sum from 2nd to 41st harmonic current is 3.04 A.

The distortion is supposed to be zero; the power factor is to be 100%. The current is 10.89 Arms. Therefore the lower limit of power factor 96% and the upper limit of distortion is 27%.

The higher harmonic of current is shown in Figs 6 and 7 when $L$ is 10 mH and 15 mH.

The ‘off’ time can’t match the condition (3rd and 5th harmonic) when $L$ is 10 mH. If $L$ is 15 mH, the ‘off’ time can match the condition in Fig. 6.

In ‘off’ time the distortion with inductance of 15 mH, power factor of fundamental wave and integrated power factor are shown in following Fig. 7:

The OFF phase angle is 37 at least distortion in Fig. 7. The OFF phase angle is 32.5 at the maximum fundamental power factor in Fig. 8. The OFF phase angle is 34 at maximum integrated power factor in Fig. 9. If the main requirement is by reference to IEC61000-3-2, the phase corresponding to least distortion is chosen, the phase corresponding to maximum integrated power factor is chosen.

Figure 8.

Fundamental wave power factor.

Figure 9.

Integrated power factor.

4.2 Circuit design

The requirement is as follows: the voltage is 90 V $\sim$ 265 VAC, the power frequency is 50 Hz, maximum output power is 300 W, the output power is 380 VDC, the switching frequency is 100 kHz and efficiency $\eta$ is no less than 93%.

Table 1
Current value

Figure 10.

Zero crossing detection.

Figure 11.

M On/Off Implementation.

(1)

Input capacitor. The rectifier is followed by a CBB which inhibits input voltage ripple and reduce differential mode interference.

$\displaystyle C_{in}=K{I_{in\max}}\mathord{\left/{\vphantom{{I_{in\max}}{(2\pi frV% _{in})}}}\right.\kern-1.2pt}{(2\pi frV_{in})}$ (7)

Where $K$ is the ripple of inductance current, which is between 10% $\sim$ 30%. It is here 20%. R is the ripple of input power which is between 3% $\sim$ 9%. It is here 5%. Therefore the capacitor is 5800 $\mu$ F/630 V.

Table 2

Voltage value

Figure 12.

Current waveform.

Figure 13.

Voltage waveform.

Figure 14.

Power factor under different inductance.

Figure 15.

Power factor under different capacitance.

(2)

Inductance. The following equation is used in order to calculate the inductance value L of ac reactor. It is obtained from ripple current by reactor located between AC input and DC link voltage

$\displaystyle I_{P-P}=\frac{V_{in}(V_{\textit{ODC}}-V_{\textit{IN}})}{\textit{% fLV}_{\textit{ODC}}}$ (8)

Where:

$I_{P-P}$ : Peak to peak current of PFC inductor.

$V_{\textit{IN}}$ : Input AC voltage.

$V_{\textit{ODC}}$ : DC link Voltage.

$f$ : Switching frequency.

$L$ : Inductance of PFC inductor.

Figure 16.

Experiment.

(3)

Switching tube and power diode. Due to the symmetry of topology one circuit is discussed. When switching tube is on, the tube current is inductance current, the diode is off and the reverse voltage is output $V_{o}$ . When switching tube is off, the diode is free-wheeling and the voltage of switching is output voltage. 1.5 times margin is proposed:

$\displaystyle U_{\textit{SM}}=U_{\textit{DM}}>1.5V_{O}=570V$ (9) $\displaystyle I_{\textit{SM}}=I_{\textit{DM}}>1.5I_{in}=7.65A$

The switching tube is here SPW20N60S5, which normal voltage VDS $=$ 600 V, normal current ID $=$ 20 A, on-resistance RDS (on) $=$ 0.19 $\Omega$ and rising time tfr $=$ 30 ns. free-wheeling diode is STTA806Dï¼Œwhich normal voltage VRRM $=$ 600 V, normal current IF (AV) $=$ 8 A, on-stage voltage drop VF $=$ 1.25 V, and reverse recovery time trr $=$ 25 ns.

(4)

Calculation of wire turn number

The coupled inductor as PFC reactor is utilized. The turn number of each wire is calculated using the following equation:

$\displaystyle L=\frac{\mu N^{2}A}{l}$ (10) $\displaystyle N=\sqrt{\frac{Ll}{\mu A}}$

(5)

Zero crossing detection of utility voltage is shown in Fig. 10:

Firstly Bidirectional photocoupler outputs short pulse. Then DSP generates external interrupt at the falling edge of pulse train.

(6)

PWM on/off Implementation

Table 3

Power factor

W	7 kW		5 kW
L	0.4 mH		0.4 mH						0.5 mH						0.6 mH						0.56 mH
C	6600 $\mu$ F		3300 $\mu$ F		4700 $\mu$ F		6600 $\mu$ F		3300 $\mu$ F		4700 $\mu$ F		6600 $\mu$ F		3300 $\mu$ F		4700 $\mu$ F		6600 $\mu$ F		4714 $\mu$ F
Input current	44.	37	32.	98	32.	82	32.	73	32.	17	32.	06	32.	00	31.	56	31.	48	31.	44	31.	70
Basic sin current	30.	42	21.	73	21.	73	21.	73	21.	73	21.	73	21.	73	21.	73	21.	73	21.	73	21.	73
Basic cos current	$-$ 8.	07	$-$ 4.	20	$-$ 4.	94	$-$ 5.	43	$-$ 4.	79	$-$ 5.	47	$-$ 5.	93	$-$ 5.	30	$-$ 5.	94	$-$ 6.	37	$-$ 5.	76
Basic RMS	31.	47	22.	13	22.	28	22.	40	22.	25	22.	41	22.	53	22.	37	22.	53	22.	64	22.	48
3rd current	12.	72	9.	38	9.	36	9.	34	9.	20	9.	18	9.	16	9.	05	9.	02	9.	00	9.	08
5th current	8.	03	6.	60	6.	45	6.	35	6.	14	5.	99	5.	88	5.	73	5.	58	5.	47	5.	73
7th current	3.	64	3.	67	3.	46	3.	31	3.	08	2.	88	2.	75	2.	60	2.	43	2.	32	2.	60
9th current	1.	37	1.	50	1.	37	1.	29	1.	13	1.	07	1.	04	0.	95	0.	94	0.	95	0.	98
11 current	1.	25	0.	82	0.	87	0.	90	0.	85	0.	89	0.	91	0.	86	0.	88	0.	89	0.	89
13th current	0.	87	0.	81	0.	80	0.	80	0.	72	0.	70	0.	67	0.	61	0.	58	0.	56	0.	62
cos $\phi$	68.	6%	65.	9%	66.	2%	66.	4%	67.	5%	67.	8%	67.	9%	68.	9%	69.	0%	69.	1%	68.	6%

Figure 17.

Topology.

Figure 18.

Current wave.

Figure 19.

Power factor.

Zero Crossing Detection of Utility Voltage is followed by PWM On shift from PWM Off in Fig. 11. When PWM rises to PWM reference, the PWM is off.

5. Conclusion

The PFC circuit is utilized to inverter air conditioner. The Figs 12–15 shows current voltage waveform and power factor. The Tables 1–3 are the specific values of current voltage waveform and power factor under different conditions. The Fig. 16 is the PFC experimental situation while Fig. 17 shows topology. When DC-link voltage exceeds maximum (minimum) allowable value, Off Angle should be decreased (increased). The circuit utilizes two-phase interleaved average Current-Mode Control (CCM). Ripple current cancellation allows smaller input and output filter components. Magnitude and rate is adjustable to help pass stringent tests. Multiple features add many levels of protection, safety and reliability. Only On-time current is sensed in MOSFET drain. OFF-time current is synthesized. (Diode sensing is not needed). The Fig. 18 is the current waveform. The current sampling device is 1:1000 times magnetic balanced hall current sensor whose transfer ratio 1 A/300 mV. External sampling resistance is 300 $\Omega$ . The peak-to-peak value is 14.76 A. The effective value is 5.2 A. The power analyzer HIOKI 3193 is utilized to measure the input power factor in Fig. 19. The current range of analyzer is 20 A (AC). The voltage range is 600 V (AC). The precision is within 0.1%. The power factor of real PFC circuit is up to 0.975.

Footnotes

Acknowledgments

This work is partially supported by Natural Science Foundation of Guangdong Province GUANGDONG (2017A030313291), (2018A030313418), (2015A030313797) and Guangdong Science and Technology Project (2016A040403028, 2017A010102020).

Conflict of interest

The authors declared no conflicts of interest.

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