Integrated Computer-Aided Engineering

This paper deals with parallel architectures for video-coding and multimedia applications. These applications play an important role in consumer electronics, and their pervasive use strictly depends on the cost/performance ratio that can be achieved with electronic systems. Nowadays the use of VLSI technology along with parallel computation techniques allow one to implement video-coding and multimedia dedicated systems with the necessary computing power and the low cost needed for the spread of these applications. The paper first introduces the problem of video-coding and multimedia applications, presenting also the main standards and the problems related to their support. Then different architectural solutions are presented with emphasis with the kind of parallelism they can exploit in the applications. Finally an architecture specifically developed for video-coding is presented. The architecture has been completely developed and fully tested, and it is now used as a testing prototype for checking the development of new application algorithms. The architecture has also been a means for verifying and solving all the practical problems that can be encountered when developing a real application based on a parallel architecture. In this sense the paper focuses also on implementation problems that arise in the development of a real architecture.

This paper describes a massively parallel dataflow computer dedicated to real-time image processing. Two types of data-driven processing elements are embedded into a regular cubic mesh: 1024 low level custom dataflow processors (50Mops/s each) and 36 T800 transputers. The programming environment relies on an extensive use of the functional programming (FP) concept. An image processing algorithm first expressed in an FP-like functional syntax is converted into a dataflow graph, the nodes of which are real-time operators to be implemented on physical processors by direct mapping onto the array. The concepts and the architecture, both hardware and software, are explained in detail. We conclude with an example of a complete implementation: a connected components labeling working in real time.

This paper concerns the definition and the evaluation of an approach to the handling of objects spanning over several partitions of a parallel data structure, whenever such partitions are assigned to different nodes of a distributed-memory MIMD parallel machine. The proposed control strategy is based on the introduction of different types of hierarchy of manager processes, which handle information exchanges between working processes operating upon the parallel data structure in a distributed way, thus avoiding the need of a single centralized controller. The structure is not tailored to a particular data parallel algorithm: it will be here applied, as an example, to a parallel edge detection algorithm.

Local processes in massively parallel computing systems can be coordinated by asynchronous system of global synchronization via handshake using current sensors for detection of the transient processes completion. The known current sensors are considered, the best one is analyzed, and its shortcomings are revealed. Current sensor with wide range of the measured current is suggested. The principles of control in circuits with current sensors are developed. Self-timed data exchange between local processes of the system is discussed. Transmission/reception circuits with single-wire bit handshake are demonstrated. Their transmission rate is no worse than that of double-wire circuits. They allow one to transmit combinations of n-bit code by n+2 communication lines.

This paper describes a three-dimensional simulator for semiconductor devices in stationary state developed on a message passing multiprocessor. A Gummel style nonlinear iteration was used, and the Poisson and the continuity equations were discretized using the finite element method. A new iterative scheme was introduced in order to solve the nonlinear Poisson equation. The nonsymmetric continuity equations were solved using a Conjugate Gradient type method, the Bi-CGSTAB. We carried out the parallelization of these approaches and their mapping onto a multiprocessor system. We introduce a new method for the distribution of the finite element sparse matrices over the multiprocessor. This method leads to highly efficient algorithms, because it obtains a good load balance and limits all the communications to length 1.