This article simplifies several small-signal CMOS circuit analysis techniques from their existing forms in textbook approaches. Several CMOS loads and circuit topologies are analyzed through a simplified “incremental perturbation” approach, and solutions can sometimes be found almost by “common-sense” inspection with some use of Norton’s and Thevenin’s transformations. In many cases there is no need to write and solve multiple equations, but just the utilization of “incremental KVL or incremental KCL.” Elimination, reduction, merger or conversion of dependent current sources through “opportunistic short circuits” is a central idea behind this methodology.
