An Introduction to Logic and Fault Simulation

Abstract

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This is an introduction to logic simulation concepts for second or third year undergraduate students in electrical engineering. The motivation, modelling techniques, and algorithms are considered for logic simulation (the verification of the design itself) and fault simulation (the verification of the test for the design).

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References

Breuer

M.A.

(Ed.), Digital System Design Automation: Languages, Simulation, and Data Base; Computer Science Press. (1975).

Breuer

M. A.

and Friedman

A. D.

, Diagnosis and Reliable Design of Digital Systems; Computer Science Press. (1976).

Bryant

R. E.

, ‘MOSSIM: A switch-level simulator for MOS LSI’; Proc. 18th Design Automation Conf. p. 786–790 (1981).

Bryant

R. E.

, ‘A switch-level model and simulator for MOS digital systems’; IEEE Trans. on Computers; C-33 p. 160–177 (Feb. 1984).

Hayes

J. P.

, ‘A unified switching theory with applications to VLSI design’; Proc. IEEE, 70, No. 10, p. 1140–1151 (Oct. 1982).

Hayes

J. P.

, ‘Fault modelling’; IEEE Design & Test, 2, No. 2, p. 88–95 (April 1985).

Law

A. M.

and Kelton

W. D.

, Simulation Modeling and Analysis, McGraw-Hill (1982).

Roth

J. P.

, Computer Logic, Testing, and Verification; Computer Science Press, (1980).

Rombeek

and Wilcox

, ‘F/LOGIC — An interactive fault and logic simulator for digital circuits’; Proc. 13th Design Automation Conf., p. 68–73 (1976).

10.

Szygenda

S. A.

, ‘TEGAS2 — anatomy of a general purpose test generation and simulation system for digital logic’; Proc. 9th Design Automation Conf. p. 116–127 (1972).

11.

Ulrich

E. G.

, ‘Exclusive simulation of activity in digital networks’; Comm. ACM, 12, No. 2, p. 102–110 (Feb. 1969).

12.

Ulrich

E. G.

, ‘Event manipulation for discrete simulations requiring large numbers of events’; Comm. ACM, 21, No. 9, p. 777–785 (Sept. 1978).

13.

Ulrich

E. G.

, ‘Table lookup techniques for fast and flexible digital logic simulation’; Proc. 17th Design Automation Conf., p. 560–563 (1980).

14.

Werner

and Beresford

, ‘A system engineer's guide to simulators’; VLSI Design, p. 27–31 (Feb. 1984).

15.

Yoeli

and Brzozowski

J. A.

, A Mathematical Model of Digital CMOS Networks; University of Waterloo, Dept. of Computer Science: Waterloo, Ont., Report No.: CS-84-22. (Aug. 1984).

16.

SILOS: Logic and Switch-Level Simulator User's Manual; SimuTec: Incline Village, NV (1983).