A new evolutionary optimization algorithm for design of low power QPSK backscatter modulator

Abstract

In this paper a backscatter modulator of passive tags used for RFID applications is proposed. For designing this backscatter modulator, QPSK modulation is utilized for transferring data from the tag to the reader. This modulator working in UHF frequency has high data rate and low power consumption. This circuit is simulated in 0.18μm CMOS technology with 1.8 V supply voltage with the help of Cadence software. TLBO algorithm is applied in order to evaluate the optimized transistors sizes for maximizing the difference between various values of varactor in modulation states. The DC power dissipation and the chip area of the proposed modulator equal to 15.57nW and 5767μm², respectively.