Abstract
With the wide application of industrial Internet of Things, the increasing amount of data and the complexity of data types, higher requirements are put forward for the performance of data acquisition gateway. In order to reduce the data acquisition time of the gateway and improve the data retrieval coverage of the gateway, a novel design method of composite data acquisition gateway based on 5G network is proposed. Based on the analysis of related technologies, the functional requirements of the composite data acquisition gateway are summarized, and the overall design of the gateway is completed. On this basis, the gateway hardware environment is constructed by designing the main control module, 5G module and FPGA program, and then the software program is designed by designing the data acquisition driver, 5G module driver, embedded software and protocol conversion process. The experimental results show that the data retrieval coverage of the gateway designed by this method is always above 92%, which is 6% higher than that of method 1. This shows that the method significantly improves the coverage of data search, speeds up the efficiency of data collection, and improves the performance of the data collection gateway, which proves the effectiveness and feasibility of the method and is conducive to promoting the intelligent development of the data collection gateway technology.
Introduction
Gateway is a complex network interconnection device, which realizes network interconnection above the network layer and is only used for the interconnection of two networks with different high-level protocols [2]. Among many types of gateways, data acquisition gateway is a safe and stable industrial data acquisition and conversion equipment. It is an intelligent device integrating data acquisition, Programmable Logic Controller (PLC), remote update, industrial computer and cloud service, and is suitable for remote management of various devices [13]. The data acquisition gateway mainly realizes the conversion from multiple protocols to one protocol in software. The hardware design is relatively simple, which is convenient for on-site installation and use [1]. At the same time, the single chip computer operating platform is introduced at the software level for later maintenance and upgrading [6]. However, in practical application, it is found that after the application of gateway design method, the data acquisition process takes a long time and the data retrieval coverage is low [25].
5G network is the fifth generation mobile communication network. Compared with the previous fourth generation mobile network, the 5G network shows more functions in practical applications. In theory, its transmission speed can reach tens of gigabytes per second, hundreds of times that of the 4G mobile network [22]. The improvement of transmission speed will greatly shorten the time required in the transmission process and play a very important role in improving work efficiency [24]. Research shows that the application of 5G network communication technology in today’s social development will greatly improve the speed of social progress and development, and promote the rapid development of human society [26]. However, the research on the data acquisition gateway is not deep enough, and the research on the combination of 5G network and its application is rare [21]. Therefore, in order to make up for the shortcomings of traditional gateway design methods, a new design method of composite data acquisition gateway based on 5G network is innovatively proposed, in order to enrich the theoretical research of data acquisition gateway, provide reference for the practical application of data acquisition gateway, enhance the performance of data acquisition gateway, improve its application value in intelligent industry and other fields, and promote the modernization of various industries.
Key technologies and development trend analysis of data acquisition based on 5G network
Technical analysis
Intelligent technology Multi-antenna transmission technology Simultaneous and same-frequency full duplex technology
In the process of 5G data collection, the core network is taken by the cloud computing platform, which contains a large server, and the connection with the base station mainly depends on the router and switch network with data slowing function [5]. Its characteristics can be summarized as follows: cloud computing reserve, large amount of data reserve, timely data with reasonable solution, wide number and form of base stations, different frequency bands serving different services, diversified antenna and connection modes, etc.
With the reform of The Times and the introduction of technology, multi-antenna technology is also improving, and its own spectrum utilization rate is increasing, which has become an essential part of the development of 5G network data acquisition system technology [14]. Multi antenna technology has successfully constructed 3D Multiple Input Multiple Output (3D-MIMO) technology by virtue of the form of source antenna array. Combining the characteristics of millimeter wave technology, the whole wireless signal coverage becomes wider and wider.
At the same time, the operating principle of the same frequency full duplex technology lies in the transmission of signals in two directions by means of physical channels, which is simply summarized as reducing the hindrance of the communication duplex node’s own transmitter signal. It can not only transmit signal of signal machine, but also
The same frequency signal of another node can be connected, and in this way, the spectral efficiency can be continuously improved.
Nanocommunication Information security and privacy
In recent years, nano-communication has also made great progress. The technical application of 5G acquisition system is studied by analyzing and utilizing its characteristics from the microscopic perspective [10]. Some researchers have proposed to learn from the propagation mechanism of cells and viruses to study the design of wireless communication system, and then study antenna modulation and capacity analysis.
At present the network layer of information security and privacy are based on the analysis method of traditional computer network, and the data acquisition system using wireless communication technology in the future, with the traditional analysis method has the very big difference, so how to solve in 5G environment have questions about user privacy and terminal security will be necessary for the acquisition system development in the future research direction, For example, from the perspective of network security backup, when the single baseband node is broken, it can also be backed up by cloud-based baseband. In addition, the optimization of coding, time ductility and router is also the future development direction [12].
For baseband equipment centralized cloth to a physical computer room also has operations in the security risk (even though this can save base station room, but the following may increase transmission machine room), a room without electricity, affects only a base station coverage before, and now may affect a large base stations, a greater impact, which is to research problem in the future.
The development trend of data acquisition technology based on 5G network
At present, data acquisition technology based on 5G network has become the future construction direction of big data acquisition field. With the development of China’s overall economic strength and the improvement of scientific and technological level, 5G network data acquisition technology is bound to become more and more mature and complete [16].
As early as 2013, Chinese companies joined the Scientific research on 5G in the European Union and other countries, and achieved excellent results due to a lot of work, and the communication technology involved in 5G also emerged at the historic moment [20]. As the most powerful basic platform, mobile Internet technology has developed so many communication skills, and 5G mobile communication technology is one of them.
As we all know, the development of various fields in China is carried out with the help of wireless network to provide users with the best service quality, which requires that the 5G network acquisition system must have the characteristics of large capacity and good quality. At present, most researchers hope to combine data acquisition technology based on 5G network with other wireless mobile communications, so as to integrate more advantages into a single point, develop strengths and avoid weaknesses, and build a high-performance and integrated service skill [17]. Therefore, the research proposes a design method of composite data acquisition gateway based on 5G network to make up for the lack of current research, enrich the intelligent technology of composite data acquisition gateway, improve its application value in the Internet of Things, achieve intelligent collaboration of industrial chain, and provide assistance for the digital transformation of industrial enterprises.
Design compound data acquisition gateway based on 5G network
Functional requirements and overall design of compound data acquisition gateway
With the advantages of fast network speed, low delay and high reliability, 5G network has a relatively broad application in the Internet of Things, vehicle network, industrial Internet and other fields. Combining 5G network with data acquisition gateway is conducive to improving the low collection efficiency, small network coverage and low data processing capacity of traditional data acquisition gateway, improving the data transmission speed and stability, and improving the undertaking performance of the core network, It can effectively control the data collection and output of the external environment, enhance the security of the network environment, improve the effective utilization of the industrial Internet of Things, and promote its intelligent and modern transformation. It can enhance the applicability of the industrial Internet of Things, improve production efficiency, save resource costs, and meet diversified industrial production needs. In addition to the functions of data collection and uploading, the complex data acquisition gateway should also have the following functions: support the command collection mode and active timing transmission mode of data center; The data collection period ranges from 10 minutes to 1 hour. The data gateway is configured with 256 GB storage space to store data for at least 28 days in case of a network fault. One data gateway can monitor, collect and upload multiple users.
The overall structure of the compound data acquisition gateway is shown in Fig. 1.

Overall structure diagram of compound data acquisition gateway.
Main control module
The main control module is mainly composed of processor and a field programmable gate array (FPGA).
Processor selection:
In this study, ARM LPC 2292 processor is used. The maximum main frequency of this processor is 600 MHz, which has rich peripheral resources. LPC2292 is a 16/32 bit Reduced Instruction Set Computer (RISC), which supports real-time simulation and tracking, has 256 KB high-speed on-chip flash memory, 16 KB Static Random Access Memory (SRAM), and 130 M Intrusion Prevention Systems (IPS) instruction processing speed, both the 32-bit Advanced RISC Machine (ARM) instruction set and the 16 bit Thumb instruction set are supported. By setting the Boot [1:0] pin of the chip, the width of the external memory interface can be changed to facilitate connection with the extended memory.
In this study, the expandable 32MB memory is an 8-bit input/output (I/O) port for time-sharing reuse of data, address and command. Boot [1:0] = 00 is fixed. The dual channel Universal Asynchronous Receiver/Transmitter (UART) interface meets the design requirements of the data gateway and does not require serial port expansion.
Universal Serial Bus (USB) 2.0 interface, 100Base-T Ethernet interface, external bus interface and external interrupt interface are used in this study.
The FPGA options:
FPGA is a kind of digital logic device that can be programmed repeatedly according to needs [23]. Xilinx A7 series XC7A35 is selected for this study. The chip has 33 K logical units and 1800KB of internal Random Access Memory (RAM), which are used for logic functions and data buffering respectively in the system [18].
Processor and FPGA interface:
The processor and FPGA use the parallel storage device bus interface for data transmission. The interface has the characteristics of simple form and good reliability. In addition, FPGA can also send interrupt request to the processor through interrupt signal, and inform the processor to read the data in cache in time.
Analog to Digital (AD) converter:
The AD converter is a 24-bit SIGma-δ AD converter from ADI. The Analog to Digital Converter (ADC) has a maximum sampling rate of 256 K/s. All parameters can be configured by external pins.
5G module
In this study, Quectel RM500Q 5G module of remote communication is selected. The module is small in size and supports USB, Peripheral Component Interconnect Express (PCIe), serial port and other interfaces to communicate with the processor. The system is connected to the 5G module through the USB 2.0 High Speed interface integrated with the processor. USB 2.0 High Speed The bit rate of the interface is 480 Mbps, which fully meets the requirements of the compound gateway for fast data transmission.
Transmission Control Protocol/Internet Protocol (TCP/IP) is used in 5G modules. The data acquisition gateway converts the data type Modbus Remote Terminal Unit (RTU) of the lower computer into Modbus TCP, and then transmits it upward by means of Ethernet, which can be achieved by means of TCP/IP protocol stack [3]. However, the traditional TCP/IP protocol stack is complicated and has poor real-time performance. Considering the limitation of system hardware resources, this paper introduces a lightweight TCP/IP protocol stack: Unique Internet Protocol (UIP) to achieve fast data transmission.
uIP stack is a free, implementable, minimal TCP/IP stack that can be used in embedded systems built with 8- or 16-bit microprocessors.
FPGA programming
In this study, the FPGA program is divided into the following modules:
Processor interface A/D digital interface Data buffering
The FPGA internally exchanges data with the processor in the form of control-state registers. Control registers control system parameters, such as sampling frequency, indicator state, clear interrupt, etc. The status register stores the current state of the system, such as the amount of buffer data in FPGA and the current interrupt state.
On the one hand, FPGA generates sampling clock according to the setting of control register; on the other hand, FPGA receives A/D data and writes it into internal RAM buffer [7]. The FPGA is also connected to the control and configuration pins of the ADC. The processor can reset the ADC, modify the working mode, query the working status and other operations through the Certificate Signing Request (CSR).
In this study, a ping-pong buffer is designed in FPGA. When the ADC data fills a buffer, an interrupt request is submitted to the processor. When the processor reads the buffer, the ADC data is written to another buffer. In this way, you solve the problem of timing between the processor reading data and the data generated by the ADC.
Software environment design
The usual gateway software platform is mainly composed of interrupts, beats and large loops. The core of the whole framework is the message mechanism.
In embedded program design, interrupt is often used to realize the loop, which can quickly respond to the external or internal interrupt signal, but it is easy to be interfered by the wrong interrupt signal [9]. In order to overcome this shortcoming, and according to the characteristics of protocol transformation, this design uses a simpler, active, safe cyclic method – scan. Through continuous active scanning in the big loop, judge the change of the state of each situation in the switch statement. Each situation corresponds to a message type, and then call different message execution programs according to different message types, so as to reduce the waiting time of the Central Processing Unit (CPU) and improve the overall efficiency of the program. However, due to the limitation of scanning period, this active scanning mode is only suitable for low-speed devices. When an unexpected event occurs, the active scanning mode can be performed only after the next scanning period.
In order to realize the precise control of the protocol conversion time, this design uses the beat generated by the chip internal clock, which effectively avoids the error caused by the conversion time error. In addition, the real-time performance of the system can be improved through the speed classification of the system beat, so that the system can run more stably and reliably. Interrupts are used to share the CPU load, help complete some tasks, reduce CPU usage, and improve overall program efficiency.
Messaging as software implementation framework of protocol conversion, mainly to predefined known tasks and events, and set a specific message processing function, when the detected event or task is triggered, and calls the appropriate message processing function, can be simply interpreted as “the news” and “news”. To make the message mechanism work, you need to set its parameter – message queue. A message is defined in two parts, the message type (MsgType) and the message value (Val).
Message queues are often defined as 16-bit unsigned integer data, with the highest 8 bits defined as the message type and the lowest 8 bits as the message value [8]. Message types are defined and enumerated in the header file according to actual requirements, which facilitates traversal of various message types. Message values are used as parameters of corresponding message processing functions. Firstly, the initialization of protocol conversion related programs is completed, and then the programs in the big loop are executed. In the big loop, the status of each message is judged by active scanning. When a message is triggered, the corresponding function function is called to realize message scheduling.
Based on the above research, in this study, embedded Linux is used as the operating system to complete the design and control of the software environment when designing the compound data acquisition gateway. The software design includes the following aspects: data acquisition driver design, 5G module driver design, embedded software design, transport layer protocol design, protocol conversion design.
Data acquisition driver design
Linux devices fall into two main categories: character devices and block devices. According to the data generation characteristics of this study, the driver is designed using the character device driver model.
The data acquisition driver consists of the following parts:
Driver initialization: The main work of driver initialization is to allocate the main device number and register the driver. Device initialization: In the device initialization program, allocate the device number, apply for THE I/O resources required by the device, register the interrupt service program with the system, and add the device to the device directory of the system. Interrupt service program: the main function of interrupt service program is to record and clear the interrupt state, and wake up the dormant process if there is a process in the reading process. Application program interface: Linux defines a standard set of interfaces between applications and device drivers for data interaction between the two. This system mainly uses read and Input/Output control (IOCTL) interfaces. The read interface is used to read the collected data. Ioctl interfaces are used to implement control functions, such as setting sampling frequency and setting A/D working mode.
Driver design of 5G module
As 5G is a relatively new technology, the existing Linux kernel does not fully support 5G modules. Kernel codes need to be modified according to the actual situation of modules. Generally speaking, module manufacturers will provide some patch codes for reference, but there are some differences between the Linux kernel used by manufacturers and the kernel used in this study, so it needs to be analyzed and modified according to the specific situation.
Embedded software design
The embedded software in this study is divided into the following modules:
Network communication module Instruction parsing module Data acquisition module Data processing module Third-party data interface
After the system is started, the network communication module starts to try to initiate a connection to the preset server address at a certain interval, and waits for the server instruction after the connection is established. The network communication module is also responsible for sending the data generated by the data acquisition module and data processing module to the server.
After receiving the server instruction, the instruction resolution module invokes different other modules to execute the server instruction according to the instruction content.
The data acquisition module realizes the functions of data acquisition, stopping and storage under the control of the instruction processing module. The data acquisition module obtains raw A/D data, which needs further processing by the data processing module.
The main function of data acquisition module is to process the data obtained by the data acquisition module, such as engineering unit conversion, digital filtering, calculation of statistics, calculation of spectrum and so on.
Third-party data can be sent to the embedded software of the system through the network. This study supports the insertion of third-party data interface in the form of dynamic library, which can facilitate the integration of third-party data and data collected in this study.
Transport layer protocol design
TCP provides a connection-oriented, reliable, and full-duplex data transmission service to ensure the reliability of end-to-end data transmission. However, establishing a TCP connection requires three handshakes, while releasing a TCP connection requires four handshakes.
User Datagram Protocol (UDP) is a connectionless and unreliable transport protocol. In terms of real-time performance and transmission speed, UDP protocol is more suitable for embedded system, but the data gateway designed in this paper has higher reliability requirements and adopts T CP protocol.
TCP data transmission consists of three phases: establishing a connection, transferring data, and disconnecting a connection. This protocol is the most complex protocol in the protocol family, and its implementation process can be described by state machine. Procedure to construct a Socket -T ype structure to record the TCP connection status information, the specific code is omitted.
Protocol conversion design
In this study, Narrow Band Internet of Things (NB IoT) technology is used to complete the conversion process of gateway protocol.
Firstly, the shortest path optimization control model of gateway protocol transformation is obtained by data forwarding and sensor node fusion tracking method. Then take the connection node between the sensor network and the external network as the root node and the neighbor node set of gateway protocol transformation is as follows:
Where, c represents the constraint feature set of data to be collected, and p represents the adaptive node of gateway protocol transformation. Through the method of random link forwarding, the node adaptive positioning model of gateway protocol transformation is constructed, and the random error ε of node positioning is obtained as follows:
Then, based on the efficient and reliable routing distribution design method of opportunistic network, multi-protocol adjustment is carried out on the multi-protocol transmission process of gateway, and node adaptive positioning is adopted to obtain the deployment model of multi-protocol cluster node of gateway as follows:
Where, λ represents the predicted value of Internet of things networking, and m represents the data distribution dimension, r represents the distance between acquisition nodes, M indicates the distance between nodes of a multi protocol cluster.
On this basis, the adaptive weighted coefficient ω of multi-protocol gateway control is obtained by fuzzy identification and multi-dimensional parameter identification. With the increase of data collection scale, the fusion rule model of balanced scheduling of collection nodes is established as follows:
Where,
Where, F indicates the reliability of gateway protocol conversion control,

A message structure transport model for gateway protocol transformation.
According to the message structure transmission model of gateway protocol transformation shown in Fig. 2, the method of multi-mode state parameter identification is adopted to obtain the transmission cost of network gateway multi-protocol node as follows:
Where,
Where,
Where, Z represents the optimized fuzzy iteration parameters of gateway protocol conversion,
According to the above fuzzy iterative parameter optimization process of gateway protocol transformation, the optimization design of the transformation protocol is carried out.
Nb-iot technology is adopted to realize multi-level route planning and algorithm design in the process of gateway protocol transformation, and the output symbol error of the hybrid sink node of gateway protocol transformation is:
Where, ρ represents the concentration probability in the deployment grid of each node, and y represents the constraint value of the gateway protocol node. Then, according to the design model of gateway protocol, the cluster number of gateway protocol transformation is d, and the output bit rate is:
Where,
Where,
According to the multi-level routing planning and algorithm design in the process, the reliability and self-adaptation of gateway protocol transformation are improved. The specific implementation process is shown in Fig. 3.

Implementation process of gateway protocol conversion.
The gateway system used in the study is divided into foreground and background systems. The application program is an infinite loop, and each functional module is called to complete its own tasks. The serial port realizes the communication between the data gateway and the user terminal. For the software design of the serial port, the detailed program used in the study is as follows: initialize the serial port Universal Asynchronous Receiver/Transmitter (UART) 0, Call the function that sends the query command in the main function. The time of periodic query is controlled in the interrupt of timer. In the case of single terminal query, the function to send the query command is directly called according to the terminal serial number of the upper computer. After receiving the query command, the terminal sends back the data and triggers UART 0 to receive the interrupt. The data reception is completed in the interruption, realizing the communication between the gateway and the user terminal. For the software design of the Ethernet port, the research uses the Socket long connection mode to realize the communication between the gateway and the data center. When there is no data transmission, the heartbeat packet will be sent every 80 seconds.
In order to verify the effectiveness of the composite data acquisition gateway design method based on 5G network, the following experiments are designed.
The experimental environment is as follows: Set up the test environment on the Matlab platform, set the number of data acquisition nodes to be 2400, the number of connecting nodes between sensor network and external network to be 48, the number of iterations for each node to realize data conversion to be 100, and the bit error rate to be 1.5%.
In the experiment, the time consuming process of data acquisition and the coverage rate of data retrieval were taken as indicators to carry out performance verification. In order to avoid the uniformity of experimental results, the traditional data acquisition gateway design method applied to the intelligent operation and maintenance platform of data center (comparison method 1) and the gateway design method based on OLE for Process Control Unified architecture (OPC UA) protocol (comparison method 2) were compared to complete the performance verification together with the method in this paper.
Firstly, the time consuming of data acquisition process of different gateway design methods is verified, and the results are shown in Table 1.
Comparing the time consuming results of gateway data collection process designed by different methods
Comparing the time consuming results of gateway data collection process designed by different methods
According to the data in Table 1, gateways designed by different methods take different time to complete the data collection process. As the amount of experimental data increases, the time required for the gateway designed in this paper to complete the data acquisition process is 20.3–39.5 s, compared with the time required for the gateway designed in method 1 to complete the data acquisition process is 26.4–49.5 s, and compared with the time required for the gateway designed in method 2 to complete the data acquisition process is 29.93–52.4 s. Therefore, the compound data acquisition gateway designed by the method in this paper can complete data acquisition in less time, indicating its high timeliness.
On this basis, the data retrieval coverage of different gateway design methods is verified, and the results are shown in Fig. 4.

Comparison results of gateway data retrieval coverage designed by different methods.
According to the results shown in Fig. 4, data retrieval coverage of gateways designed by different methods varies. As the amount of experimental data increases, the data retrieval coverage rate of the gateway designed by the method in this paper always remains above 92%. Compared with the gateway designed by method 2, the maximum data retrieval coverage rate of the gateway can reach 92%, but the value is generally lower than that of the method in this paper. Among the three methods, the gateway designed by comparison method 1 has the lowest data retrieval coverage. Therefore, the compound data acquisition gateway designed by the method in this paper can effectively retrieve the data to be collected and lay a foundation for the subsequent high-performance transmission. The energy consumption per unit time in the gateway data acquisition process of different gateway design methods is verified, and the results are shown in Table 2.
Comparison of energy consumption per unit time in the process of gateway data collection designed by different methods
From Table 2 that there is a significant difference between the energy consumption per unit time of 5G data acquisition gateway and other methods. In the process of data collection, the energy consumption per unit time is kept at 0.3–1.6 J; The maximum energy consumption of method 1 is 2.1 J, and the minimum energy consumption is 0.5 J; Method 2 The energy consumption per unit time varies between 0.6–2.4 J, which is 0.3–0.8 J higher than that of 5G data acquisition gateway. It can be seen that the 5G data acquisition gateway greatly reduces the difficulty of data acquisition, reduces the network energy consumption of data acquisition, and can meet the development requirements of green enterprises in modern society.
It can be seen from the above research results that the design method of composite data acquisition gateway based on 5G network has improved the efficiency of data collection and reduced the cost of collection time. In the research on improving the efficiency of data collection of the Internet of Things, Ma et al. [15] took the unmanned infrastructure as the premise, took the UAV low orbit satellite system as the research object, and focused on resource allocation, The research on industrial Internet of Things as an object field is not deep enough and sufficient; In terms of specific data collection efficiency, it is more efficient than Xie R and other scholars’ research on 5G network layered cache design [19]. As the main direction of the new generation mobile communication technology, 5G network has greatly improved the transmission speed, accelerated the application of remote network, and provided technical support for collecting large amounts of data and improving the efficiency of data processing. At the same time, it has higher requirements for network delay. The low delay characteristics reduce the time waste caused by network delay of the data gateway, which is conducive to improving the real-time performance of data processing of the data gateway and improving the utilization of the gateway. The design method of composite data collection gateway based on 5G network also improves the data retrieval coverage of the gateway. Compared with the same indicator in the research on 5G physical network by Huang et al. [11], this indicator has been greatly improved. As 5G network is a ubiquitous network, it has extremely high coverage of the breadth and depth of data, which enhances the network’s sensitivity to data, expands the scope of data retrieval, helps reduce many problems in the operation of the Internet of Things due to data acquisition errors, such as inaccurate equipment control and unstable connection, improves the security and reliability of the network, and meets the network needs of enterprise production, It has promoted the automation of industrial production. At the same time, the 5G network deploys the network through cellular network and other technologies, reducing the deployment cost and difficulty, and significantly reducing the network energy consumption. Compared with the research of Chergui and Verikoukis [4], the gateway data acquisition energy consumption is reduced. The gateway data collection can be reduced well, which is conducive to expanding the application scale of the industrial Internet of Things, improving the application scope of the network, and promoting the upgrading of the data collection gateway.
As a low power consumption, high reliability equipment, data acquisition gateway plays a huge role in the industrial Internet of Things. In order to optimize the application effect of data acquisition gateway, a design method of composite data acquisition gateway based on 5G network is proposed and its effectiveness is tested. In the application experiment of the method, the time required for the gateway under this design method to complete the data acquisition process is 20.3–39.5 s, which is about 6–10 s and 3–9 s higher than that of method 1 and method 2 respectively; With the increase of the amount of data, the data retrieval coverage is stable at 92%, and the gateway data retrieval coverage designed in Method 1 and Method 2 is maintained at 90% and 86% respectively; Its energy consumption per unit time is kept within the range of 0.3–1.6 J. It can be seen that this method improves the shortcomings of traditional data acquisition gateways, reduces the time cost of data acquisition, expands the coverage of data retrieval, and is conducive to improving the flexibility and efficiency of industrial equipment control, providing a technical basis for the modern development of industrial Internet of Things.
